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As a continuation of our previous discussion about selection criteria of BLE SoC for building BLE based IoT devices, we will discuss in detail about the most important considerations for BLE RF layout design and antenna selection from various types available. The communication range of a wireless device with a current limited power source depends mainly on the RF layout, antenna design, and enclosure. Increased operating distance can be achieved with the type of antenna chosen together with carefully designed RF layout with few matching components to ensure most of the power from the BLE SoC reaches the antenna. The more power an antenna can transmit from the SoC, the larger the distance it can cover.

RF layout

RF layout involves routing the transmission lines from BLE SoC to antenna with few matching components in between. RF transmission lines acts as a medium that carry RF power from a BLE SoC to antenna, hence they need to be routed with many constraints to get maximum RF power delivery to antenna. There are several types of transmission lines, the two most popular types are:

  1. Microstrip Line
  2. Coplanar wave guide (CPWG)

Both of these are PCB traces differing in how they are constructed for maintaining the 50-ohm characteristic impedance. There are online calculators available which help us to calculate the impedance of the transmission based on our parameter input.

Microstrip Line – This type of transmission line has a signal trace on top of a substrate with a ground plane beneath the substrate. A microstrip line is simple to construct, simulate, and fabricate. The characteristic impedance of a Microstrip line depends on the following factors,

  1. Substrate height (H)
  2. Dielectric constant of the substrate (εr)
  3. Width of the trace (W)
  4. Thickness of the RF trace (T)
Transmission Line type

MicroStrip Line

CPWG – This is similar to the microstrip, but it has a copper pouring on either side of the RF trace with a gap between them. It provides better isolation for RF traces and a better EMI performance and makes it easier to support the grounding of matching components on an RF trace. The characteristic impedance of a CPWG depends on the following factors:

  1. Substrate height (H)
  2. Dielectric constant of the substrate (εr)
  3. Width of the trace (W)
  4. The gap between the trace and the adjacent ground fill (G)
  5. Thickness of the RF trace (T)
Transmission Line type

Coplanar Wave Guide

Nowadays the SoC manufacturers provide reference designs from which we get the guidelines for routing the RF transmission lines and the values (typically capacitance and inductance values) of the matching components. The designer in addition to the routing guidelines must also note the recommended PCB stackups for desired performances, since the impedance of the RF lines will change depending on the PCB layers stackups. In most of the cases, the PCB fabricator may not match the exact stackup as recommended and at these conditions there will be a need for slight changes in the RF trace width, gaps or thickness to ensure the correct impedance value.

Antenna Types

Antenna is a critical part of any wireless devices that transmits and receives electromagnetic radiation in free space. Antenna is nothing but a conductor exposed in space. When the length of a conductor is a certain multiple or ratio of the wavelength of the signal (λ) it behaves like an antenna and radiates the electrical energy into free space in the form of electromagnetic radiation of that frequency to free space. BLE device range requirement, costs and form factor are the main factors to be considered for choosing the antenna. For BLE applications (2.4GHz), most common types of PCB antennas are as follows,

  1. Wire antenna
  2. PCB Trace Antenna
  3. Chip antenna
  • Wire antenna: It is a piece of wire rise from PCB plane and protrudes to free space over a ground plane. Wire antenna produces best performance and RF range due to its dimension and better exposure. They can be in different forms such as straight wire, helix, loop, etc. A through-hole pad is sufficient to solder the wire antenna, thus saving the board dimension and hence low PCB cost.
Type of Wire antenna

Wire Antenna – Straight and Helix Type

  • PCB antenna: This is a copper trace drawn on the PCB. These antennas are inexpensive and easy to design, because they are a part of the PCB and provide good performance. Meandered trace, inverted F-trace is the most popular PCB antenna’s used in many designs. Meandered trace antenna is recommended for applications that require a minimum PCB area and Inverted F antenna is better compared to meandered antenna for radiation, but it requires space higher than meandered antenna. Main drawback of PCB antenna is that, it may require two or more revision to get expected range performance. This can be avoided by using the antenna design application notes and stack up recommended by the chip vendors carefully.
Types of PCB Antennas

PCB Antenna Types

  • Chip antenna: For applications where the PCB size is to be extremely small, chip antenna is a good choice. They are commercially off the shelf antennas that occupy very small PCB area and offers reasonable performance. But the disadvantage of chip antenna is the increased BoM and assembly cost since they are external components that need to be purchased and assembled. Also the chip antennas are very sensitive to RF ground clearance and the manufacturers RF ground clearance recommendations must be followed strictly.
Types of BLE Antenna

Chip Antenna

There are some applications which need antenna’s to be placed on or outside the enclosure for better reach. In such conditions, there are options for providing antenna connectors on board and extending the connection to the external antenna or other mating connector through shielded wire.

Types of external antenna connection

Antenna Connectors

  • U.FL connector: There are miniaturized RF connectors for high frequency signals. The male connectors are generally surface mounted and soldered directly to the PCB. The female connectors are crimped at one end of the shielded wire and the other end may be a PCB antenna or a mating connector such as SMA, MMCX, etc.
Type of antenna connector

U.FL Connectors

  • MMCX connector: These are Micro-Miniature Coaxial connector. They have a lock-snap mechanism which allows 360 degree rotation. It is comparatively better than U.FL in terms of insertion and removal lifetime and has over 10 times that of U.FL connectors. They are also available in surface mount package.
Type of MMCX connectors and cables

MMCX Connector

About Embien

Embien Technologies is a leading provider of embedded design services for the Semi-conductor, Industrial, Consumer and Health Care segments. Embien has successfully executed many projects like based on IoT such as healthcare Wearables, Gateways, and Data Analytics etc. Embien also offers a set of wearable design collections complete with electronics, firmware and Cloud that can be used to shorten product development costs and time significantly.

This blog is the sequel of blog “Bluetooth technology”. In the previous blog “Bluetooth Technology” we discussed in detail about the basics of Bluetooth, how communication takes place and how are they classified. In this blog, we will describe in detail about various parameters and options that are available in each while designing a Bluetooth Low Energy (BLE) based IoT device.

Today we find numerous BLE enabled IoT devices emerging in market with typical applications such as wrist wearable in healthcare, Beacons & tags in retail and many more in home automation, industrial, automotives etc. In all these domain applications, most important criteria’s while designing the device are as follows

  1. Cost
  2. Form factor
  3. Range
  4. Sensor integration
  5. User interface
  6. Power supply

In the following sections we will discuss in detail what are all important for selecting a BLE SoC in building a BLE based IoT devices and multiple options that are available to choose from.


BLE SoC is an integrated chip that includes both the Microcontroller and BLE transceiver. They are also named as wireless microcontrollers. The microcontroller part includes the core, flash memory, RAM and peripherals such as GPIO, I2C, SPI, UART, timers, ADC, etc. BLE part includes RF transceiver compatible with BLE specifications (usually v4.0, v4.1 or v4.2). In addition to BLE, some of the SoC also supports IEEE 802.15.4 standard compliance which is a standard that defines the operation of low-rate wireless personal area networks (LR-WPAN). It is the basis for the ZigBee, MiWi, Thread etc.

Following are the selection criteria for BLE SoC,

  1. Core: Most of the BLE SoC in the market is powered by ARM Cortex core such as Cortex-M0+, Cortex-M3 etc. There are few SoC with 8051 core also. The choice of the core depends on the nature of the application, where M3 will be a better choice for high computational performance, real time applications and M0+ for low cost yet better performance applications.
  2. Memory: All the SoC will have on-chip SRAM and Flash memory, where the size of the flash memory is of more concern which will be loaded with the application, OTA code and BLE stack.  Hence selecting SoC with sufficient flash memory will be advisable. In some cases the application code and BLE stack itself will accommodate the full flash memory and there will be no more memory to support OTA. In such case, there is no other option than going for external EEPROM which adds some cents to dollars in the BoM.
  3. TX/RX Power: For any BLE based wireless application, range will be an important factor. The power of the transceiver is the main factor deciding the range. The transceiver power will be specified in dBm. More the dBm, better is the range. The range factor will also depend on the type of antenna used in the design and the same will be discussed in the upcoming section.
  4. Power: Mostimportantof all criteria is the power consumption. Both MCU and RF transceiver power consumption should be taken into account while selecting the SoC. BLE TX/RX and core/peripheral power are the major power consuming sections. During selection of SoC, the most important points to be taken in to account with respect to power consumption is as follows
    1. Option for controlling the TX/RX power: Power consumption due to TX/RX can be controlled by varying the TX/RX power. Less the TX/RX power, lower is the power consumption but it has considerable impacts on range as well.
    2. Option for multiple low power operating modes: Low power modes are the operating modes where some of the peripherals, clocks, etc in the MCU are disabled for low power operation. By selecting appropriate low power mode based to the application, the power consumption can be reduced.
  5. Peripherals: The core section of the BLE SoC includes multiple peripherals such as I2C, SPI, I2S, GPIOs, Timers, UART, ADCs, etc. BLE SoC under consideration should have multiple options to support external interfaces such as sensors, actuators, displays, audio visual indications, etc. For example, a fitness tracker is a BLE based wearable device that requires multiple digital sensors to acquire the real time data from the body such as MEMS sensors like accelerometer, gyroscope, magnetometer etc and such sensors provide digital data that can be acquired by interfacing with the BLE SoC through I2C and SPI. For analog sensor based applications the analog signals from the analog front end circuits can be acquired using the high resolution ADC available in the SoC. Some devices may require audio notifications such as buzzers which can be driven by the PWM signals available in the timers.
  1. Package: BLE SoC’s are available in SMD packages such as QFN and BGA. Among them QFN package is most common. The soldering process recommended for both packages by the chip vendors will be machine soldering which adds extra assembly costs.
  2. Operating conditions: The operating grade is a very important during the selection of SoC. The designed must careful in selecting the domain where the device is going to be used such as industrial, automotive, commercial or medical. For example, a commercial grade SoC is not suitable for automotive grade applications.
  3. Availability of the evaluation platforms, source code and stack ups should be verified which can support rapid product development.

Following are the popular BLE SoC part numbers available in the market from various semiconductor manufacturers,

      • Texas Instruments: CC2540, CC2541, CC2640, CC2650
      • NXP Semiconductors: KW30Z/31Z, KW40Z/41Z
      • Renesas: RL78/G1D
      • Nordic: nRF52840, nRF52832, nRF51822, nRF51824, nRF51422
      • STMicroelectronics: BlueNRG-1

In addition to the SoC, for a device design that require only BLE connectivity, there are various modules available. These modules will include the SoC with inbuilt chip or PCB antenna. All the necessary peripherals will be brought to the expansion connectors and the power can be fed through the same. The communication with the BLE module will be an I2C/SPI/UART interface. The main advantage of those BLE modules is that, they are fully tested and compliance certified.

About Embien

Embien Technologies is a leading provider of embedded design services for the Semi-conductor, Industrial, Consumer and Health Care segments. Embien has successfully executed many projects like based on IoT such as healthcare Wearables, Gateways, and Data Analytics etc. Embien also offers a set of wearable design collections complete with electronics, firmware and Cloud that can be used to shorten product development costs and time significantly.

Saravana Pandian Annamalai
27. October 2016 · Write a comment · Categories: ARM, Embedded Software, Technology · Tags: ,

With an understanding of ARM registers and Exception model, now we are ready to explore the ARM interrupt controllers. These are the modules that sit in between the interrupt sources (peripherals) and ARM cores deciding how to route the interrupts to.

The ARM core accepts only two input signals handling unscheduled interrupts from the external systems – nIRQ and nFIQ. If IRQ is asserted, the system enters IRQ mode as discussed earlier or if FIQ is asserted, FIQ mode is entered.

It is up to the ARM licences i.e SoC manufacturer to decide the mechanism to route the interpret signals to the core. There are many ways to implement the interrupt controllers each of which are discussed in detail in this blog.

Vendor Specific Model

In the early ARM implementations where there used to be only one core in general, the logic for this routing of interrupts to the core is done by the SoC manufacturer mostly based on their design philosophy. More likely there will be a set of following registers

  • RAW Interrupt Status register
  • Interrupt Enable Register
  • Interrupt Status Register
  • IRQ Priority Encoding
  • FIQ/IRQ Selection

Up on assertion of any interrupt line, the interrupt source is checked if it is configured as FIQ. If so, the signal is routed to the core immediately. If it is an IRQ interrupt, ARM interrupt status is updated. If multiple interrupts occur simultaneously, the priority is resolved between other pending interrupts and finally the core is given the interrupt signal.

The below diagram gives a model implementation for the Interrupt Controller by Freescale called the Interrupt Collector (ICOLL) used in Freescale/NXP iMx233/iMx28 series of MCUs.

Freescale Interrupt Collector

Vendor specific Interrupt Controller

Vectored Interrupt Controller – VIC

ARM itself came up with a model called Vectored Interrupt Controller (VIC). Sitting directly on the AMBA High Speed bus, the latency is significantly reduced. Being an early generation controller it supports 32 interrupt sources each of which can be routed to either FIQ or IRQ signals. A unique feature of VIC is that, as it name suggests, it supports 16 vectored interrupts. In this there are 16 registers where the address of the corresponding interrupt service routines (ISR) can be saved. Based on the priority, the VIC identifies the high priority interrupt and loads its ISR address to a register called VICVectAddr. The firmware can simply use a LDR PC instruction to jump to this ISR. This saves a lot of software effort in branching to the ISR there by reducing latency.

Interrupt Controller from ARM

Vectored Interrupt Controller (VIC)

But VIC supports only level sensitive interrupts that must remain active HIGH till the ISR services it. Thus for these reasons, many SoC designers preferred their own implementation rather than the VIC.

Generic Interrupt Controller – GIC

As processors evolved, soon the number of interrupts became quiet large and also it was not uncommon to have more than 1 core (either symmetric or asymmetric), there was a need for a more standardized way of handling interrupts.

ARM defines Generic Interrupt Controller that suits this need. Though vendors are still free to choose their own mechanism, GIC has become very popular and is almost present in all modern SoCs. It consists of primarily two components – Distributor and CPU interfaces. The primary functionalities of the same include


This is the peripheral facing component that is available as only one implementation (instance). It is responsible for managing interrupts in the whole system and decides priorities between them and routing mechanism of the same.

CPU Interfaces:

For each CPU core available, there is a corresponding CPU Interface present bridging the Distributor interface with the core. It implements the priority masking for the processor.

The below diagram explains the same.


ARM's Interrupt Controller for Multi-core SoCs

ARM Generic Interrupt Controller (GIC)

The interrupts are identified by unique ID and could be in any one of the following 4 states (as explained by the GIC Architecture Specification):

  • Inactive: An interrupt that is not active or pending.
  • Pending: An interrupt from a source to the GIC that is recognized as asserted in hardware or generated by software and is waiting to be serviced by a target processor.
  • Active: An interrupt from a source to the GIC that has been acknowledged by a processor, and is being serviced but has not completed.
  • Active and pending: A processor is servicing the interrupt and the GIC has a pending interrupt from the same source.

Based on the source, there are three major types of interrupts defined.

Shared Peripheral Interrupts – SPI: These interrupts sources are typically from different peripherals in the system. They can be routed to (i.e shared with) any one or more of the cores as per the requirement and will be handled suitably. For example, UART0 and UART1 interrupts could be SPI and configured in the Distributor to be routed to two available cores. Up on UART0 interrupt, the signal is routed to first available processor. If at that instance, UART1 interrupt is received, the distributor routes it to the other core for handling.

These are assigned Interrupt ID from 32 to 1019.

Private Peripheral Interrupts – PPI: There could be interrupts that are only specific to one processor. In such cases, they are routed to PPI of only that processor. For example in an asymmetric system with a Cortex A5 and Cortex M4, a Watchdog interrupt corresponding to A5 will be routed only to the A5 core. There might be no need to share it with the M4. Hence it will be routed as a PPI.

The interrupt ID is defined from 16 to 31.

Software Generated Interrupts – SGI: ARM defines interrupt IDs 0 through 15 specifically for Inter processor communication. It is possible a SGI can be routed to one or more processors through the Distributor.

The Interrupts 0 to 31 are banked by the distributor for each CPU Interface i.e. each processor sees them different and are identified by the CPUID. For example, PPI 16 could be pending in CPU0 but not in CPU1. Whereas, in case of the SPI, it will be same across the CPU’s as they are not banked.

Irrespective of all these, each core is provided signal through either nIRQ or nFIQ lines for interrupting program execution.

Nested Vectored Interrupt Controller – NVIC

While the above implementations are suitable for powerful processors, there is a need for specialized handling in microcontroller profiles that typically run in sub-100MHz speed and with few tens of kilobytes of RAM and flash. It is important to reduce the interrupt latency and to leverage the fact that the number of peripherals is less and hence fewer interrupt sources. For that, ARM defines a NVIC model for the Cortex-M implementations.

In Cortex-M implementation, the interrupt service routine addresses are to be provided in a set of consecutive addresses at offsets corresponding to the vector number. As soon as the interrupt signals are received, the NVIC finds the ISR corresponding to the highest priority interrupt and jumps to it.

The Cortex-M core accepts only nIRQ interrupt and there is no option for a FIQ.

With our understanding of hardware implementation, in the upcoming blogs, we will discuss software mechanism in handling interrupts in ARM architectures.